Article ID: 000075042 Content Type: Troubleshooting Last Reviewed: 08/27/2020

Why are the CONF_DONE and INIT_DONE signals not de-asserted once nCONFIG goes low in Intel® Stratix® 10 and Intel® Agilex™ FPGAs operating in PMBus Slave Mode?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using ntel® Stratix® 10 and Intel® Agilex™ FPGAs,  CONF_DONE and INIT_DONE signal will go low typically in less than 1ms after nCONFIG goes low.
    In PMBus (SmartVID) Slave mode, it may take longer time for the Secure Device Manager (SDM) to de-assert the CONF_DONE and INIT_DONE, depending on when the VOUT_COMMAND is issued by the external master.
    In this mode, a handshake between the PMBus master and FPGA is required to adjust the core power supplies to the nominal value after nCONFIG goes low.
    The SDM de-asserts the CONF_DONE and INIT_DONE signal only after receiving the VOUT_COMMAND from the external master.

    Resolution

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.1.

    Related Products

    This article applies to 2 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs
    Intel® Stratix® 10 FPGAs and SoC FPGAs

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