On page 21 of the ARM-Based Embedded Processor PLDs Hardware Reference Manual version 1.4, it says, "The embedded processor supports the following AHB transfer types: INCR, INCR4, and INCR8."
On page 26, in the "Bus Architecture" section, it says, "All AMBA AHB protocols are supported." According to the AMBA Specification Rev 2.0, there are 8 transfer types: SINGLE, INCR, WRAP4, INCR4, WRAP8, INCR8, WRAP16, and INCR16.
These two seemingly opposed statements may cause some confusion. The embedded processor and the AHB bridges actually support different types of burst. On the PLD-side, all AMBA burst types are supported. The processor supports INCR, INCR4, and INCR8 burst transfers.
The performance advantage in a defined length burst is that the slave could auto-increment the addressing on its own, versus the master completing the addressing function. Then the master can build up the next burst address and control instead of completing the address and control for the previous transaction. However, Altera slaves in the stripe do not do this, so the net performance for a defined versus undefined length burst is the same.
The performance and result of a burst of unspecified length and that of a defined length are the same. For example, a unspecified-length burst of 4 beats gives the same result as INCR4.