Article ID: 000074967 Content Type: Troubleshooting Last Reviewed: 04/19/2023

dd: failed to open ‘/dev/altera_cvp’: Device or resource busy

Environment

    Intel® Quartus® Prime Pro Edition
    Interfaces
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the Intel® Quartus® Prime Pro Edition Software version 20.3, when using the Configuration via Protocol (CvP) scheme on Intel Agilex® 7 devices and the OSC_CLK_1 pin to provide the configuration clock, you may see this error when loading a core.rbf image through the CvP Update flow if the configuration clock was not running for a given time while in user mode.

Resolution

To work around this problem, power cycle the system and ensure the configuration clock continuously runs before trying to update the core.rbf image through the CvP Update flow.

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.4.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

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