Article ID: 000074798 Content Type: Troubleshooting Last Reviewed: 07/20/2018

Question about re-calibration of IOPLL

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

There is no requirements of recalibration for IOPLL. If the reference clock of IOPLL is not stable during power up or user mode, you need to reset IOPLL after reference clock is stable.

Related Products

This article applies to 3 products

Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 GT FPGA
Intel® Arria® 10 GX FPGA

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