Use the following procedure to program your design into the CFI flash memory device on the Intel® Arria® 10 Development Kit.
1. When using the Windows version of the Intel® Quartus® software, open the Nios® II command shell.
2. Create a .flash file from a .sof for your design.
2a. Refer to build_factory_readme.txt, which you can find in the folder where you installed the Arria 10 GX FPGA Package for the development kit.
<package install folder>\factory_recovery\build_factory_source
2b. There are example commands to convert a .sof to a .flash file. To program your design, execute one of those commands according to your target area. Replace file names with your file names when executing the commands.
3. Program the .flash file.
3a. Set up the board with the default settings according to the Arria 10 FPGA Development Kit User Guide.
3b. Connect a USB cable to the onboard USB Blaster II or an external USB Blaster II cable to the JTAG header.
3c. Run the Quartus Prime Programmer.
3d. Program the following board update portal design to the Arria 10 device.
<package install folder>\examples\board_update_portal\<your device version>\a10_fpga_bup.sof
3e. Execute the following command on Nios II command shell
nios2-flash-programmer --base=0x00000000 <your file name>.flash
To configure your own design image by reconfiguration, use the following procedure.
1. Set your board with the default settings following the instructions in the Default Switch and Jumper Settings section of Arria 10 FPGA Development Kit User Guide
Arria 10 FPGA Development Kit User Guide locates it in the following path.
<package install folder>\documents\ug_a10_fpga_dev_kit.pdf
2. Power up your board
3. Push image select push button (S5) to select your own design image. Program LED [2:0] (D12, D13, D14) indicates which image is selected.
4. Push the program configuration push button (S6) to load the selected image to FPGA
When your own design image is located in the factory image area or user hardware1 area, it can be configured at power-up using the following procedure.
1. Set your board with the default settings following the instructions in the Default Switch and Jumper Settings section of Arria 10 FPGA Development Kit User Guide, except for the load selector switch (SW6.4).
2. Set the load selector switch (SW6.4)
2a. When your own image is located in the factory image area, set SW6.4 to ON
2b. When your own image is located in the user hardware1 area, set SW6.4 to OFF
3. Power up your board
Note that the above procedure assumes the MAX® V device on the board contains the factory default system controller design and the CFI flash memory device has the factory default memory map.
Please take a look at the description above.