Article ID: 000074684 Content Type: Troubleshooting Last Reviewed: 04/24/2020

Tcl error: ERROR: Argument <clk_object> is a collection with more than one object. Specify a collection with one object. while executing "get_clock_info -period [get_clocks [lindex $fclk_setting_name 0]]

Environment

  • Intel® Arria® 10 FPGAs and SoC FPGAs
  • Intel® Cyclone® 10 GX FPGA
  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    For Intel® Arria® 10 and Intel® Cyclone® 10 GX devices, when using LVDS SERDES Intel FPGA IP with External PLL configuration in Intel® Quartus® Prime Pro Edition software, you may find the below error during timing analysis, while executing “Report RSKM”.

    Tcl error: ERROR: Argument is a collection with more than one object. Specify a collection with one object. while executing "get_clock_info -period get_clocks [index $fclk_setting_name 0]]

    Resolution

    To avoid this error, add the below command in the sdc file.

    derive_pll_clocks -create_base_clocks

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