Article ID: 000074525 Content Type: Troubleshooting Last Reviewed: 12/27/2013

CPRI MegaCore Function User Guide Missing Description of map_tx_start_mode field in CPRI_MAP_CONFIG register

Environment

  • Quartus® II Subscription Edition
  • CPRI
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The CPRI IP core CPRI_MAP_CONFIG register includes a map_tx_start_mode field at bit [5], starting in the CPRI IP core v11.1 release. However, the CPRI MegaCore Function User Guide does not document this register field.

    The CPRI_MAP_CONFIG register field map_tx_start_mode field is a Read-Write register field that specifies the selection mode for start-up synchronization on the transmit side of the IP core. This field is relevant only when the IP core is in FIFO mode (the Enable MAP interface synchronization with core clock parameter is turned off and the map_tx_sync_mode field of the CPRI_MAP_CONFIG register has the value of 0).

    When this register bit has the value of 0, the IP core aligns the first IQ sample it sends on the CPRI link with the existing start threshold.

    When this register bit has the value of 1, the IP core aligns the first IQ sample it sends on the CPRI link with the CPRI frame offset.

    In Quartus II software releases that precede the 11.1 release, bit [5] of the CPRI_MAP_CONFIG register is Reserved.

    Resolution

    This issue is fixed in version 13.1 of the CPRI MegaCore Function User Guide.

    Related Products

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    Intel® Programmable Devices