Article ID: 000074352 Content Type: Error Messages Last Reviewed: 09/08/2017

Error (175006): Could not find path between source pin and the global clock driver

Environment

  • ALTCLKCTRL Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see this error message in the Quartus® Prime software when targetting an Arria® 10 device and you have connected the Clock Control Block (ALTCLKCTRL) IP inclk port to a dedicated clock input pin which differs from the Pin Mapping in Arria 10 Devices.

    Resolution

    Ensure that ALTCLKCTRL inclk is connected to the correct dedicated clock input pin as in Pin Mapping in Arria 10 Devices.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

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