Article ID: 000073965 Content Type: Troubleshooting Last Reviewed: 06/18/2020

Why does the Intel® PDN Tool suggest 0 decoupling capacitors when using an Enpirion® VRM?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The Intel Power Distribution Network (PDN) Tool might suggest 0 decoupling capacitors when using an Enpirion Voltage Regulator Module (VRM). The Enpirion VRM models in the PDN Tool include the base required bulk capacitance that is documented in the Enpirion datasheet.

    Resolution

    If the combined Enpirion VRM and base capacitance models used in the PDN Tool meet your FPGA design specific target impedance, no further capacitors will be added by the PDN Tool.

    If you choose to adjust the Enpirion VRM compensation by adding more bulk capacitance as directed by the Enpirion Datasheet, you must add this extra bulk capacitance to the PDN Tool manually.

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs
    Intel® Arria® 10 FPGAs and SoC FPGAs