Error: add_fileset_file: No such file C:/intelFPGA/19.1/ip/altera/altera_nios2_gen2_rtl/cadence/altera_nios2_gen2_rtl_module.sv

Due to problem with the Intel® Quartus® Prime Standard Edition software version 19.1 onward, you may get the above mentioned error when generating a testbench for simulation for Nios® II design in Platform Designer.

To workaround this problem, go to C:/intelFPGA/19.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl and comment out below lines:

add_fileset_file "cadence/altera_nios2_gen2_rtl_module.sv" SYSTEM_VERILOG PATH "$NIOS_ENCRYPTED/cadence/altera_nios2_gen2_rtl_module.sv" "CADENCE_SPECIFIC"

add_fileset_file "synopsys/altera_nios2_gen2_rtl_module.sv" SYSTEM_VERILOG PATH "$NIOS_ENCRYPTED/synopsys/altera_nios2_gen2_rtl_module.sv" "SYNOPSYS_SPECIFIC"

This problem is fixed starting with the Intel® Quartus® Prime Standard Edition software version 21.1.