Article ID: 000073895 Content Type: Troubleshooting Last Reviewed: 01/04/2023

Why are the names of Intel® Stratix® 10 Hard Processor System(HPS) I2C signals for FPGA routing in s10_5v4.pdf different to those shown in Platform designer >Generate>Show Instantiation Template?

Environment

    Intel® Quartus® Prime Pro Edition
    Hard Processor System Intel® Stratix® 10 FPGA IP
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Description

Due to a problem in the Intel® Stratix® 10 Hard Processor System Technical Reference Manual s10_5v4.pdf version 2018.08.08, the names of HPS I2C Signals for FPGA Routing are different when compared with Platform designer>Generate>Show Instantiation Template. 

Resolution

The Intel® Stratix® 10 Hard Processor System Technical Reference Manual is due to be updated to change the names of HPS I2C signals for FPGA routing as shown below:

Current Signal Name

Change it to

i2c<#>_scl

i2c<#>_scl_in_clk

i2c<#>_out_clk

i2c<#>_clk_clk

i2c<#>_sda

i2c<#>_sda_i

i2c<#>_out_data

i2c<#>_sda_oe

 

This problem has been fixed in the 19.4 and latest release of the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.

Related Products

This article applies to 1 products

Intel® Stratix® 10 SX SoC FPGA

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