Description
Due to a problem in the Intel® Quartus® Prime Pro software version 18.0, this error may be seen in an Intel Stratix® 10 MX design with the top and bottom HBM2 interfaces connected to the same core clock.
Resolution
Use a separate core clock for each HBM2 interface.
This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro software.
