Article ID: 000073735 Content Type: Troubleshooting Last Reviewed: 11/18/2017

Qsys Pro Does Not Support VHDL Generation for Synthesis and Simulation

Environment

  • Intel® Quartus® Prime Pro Edition
  • Simulation
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Quartus® Prime Pro Edition software\'s Qsys Pro beta feature does not support VHDL generation for synthesis and simulation.

    Resolution

    Generate your synthesis and simulation files in Verilog.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices