IP Compiler for PCI Express User Guide Does Not Document derr_cor_ext_rcv Signal as a Debug Signal

The IP Compiler for PCI Express User Guide does not document the fact that the derr_cor_ext_rcv[1:0] signals are debug signals. These signals do not affect the operation of the IP Compiler for PCI Express.

This issue affects all IP Compiler for PCI Express HIP variations that target an Arria II GZ, Cyclone IV, Stratix IV, or Stratix V device.

In Arria II GZ and Cyclone IV devices, derr_cor_ext_rcv[1] is not functional in any case, because IP Compiler for PCI Express variations that target these devices have only a single virtual channel. For variations that target these devices, this issue affects only the derr_cor_ext_rcv[0] signal.

To avoid any issue that arises from driving logic with a derr_cor_ext_rcv signal, ensure that you use these signals in your design only for debugging purposes.

This documentation issue will be fixed in a future version of the IP Compiler for PCI Express User Guide.