|Key Features||Free License (Standard)||Paid License (Standard)||Free License (Pro)||Paid License (Pro)|
|Supported Device Families|
|Cyclone® V SoC||✓||✓|
|Arria® V SoC||✓||✓|
|Intel® Arria 10 SoC||✓||✓||✓||✓|
|Intel® Stratix® 10 SoC||✓||✓|
|DS-5 Intel SoC FPGA Edition Features|
|Linux* application debugging over Ethernet||✓||✓||✓||✓|
Debug with Intel FPGA Download Cable II
Debug with DSTREAM
|Streamline Performance Analyzer support||Limited||✓||Limited||✓|
|Sourcery CodeBench Lite ARM EABI GCC||✓||✓||✓||✓|
|ARM Compiler 5 (included in DS-5 Intel SoC FPGA Edition)||✓||✓|
|ARM Compiler 6 (included in DS-5 Intel SoC FPGA Edition)||✓||✓|
|Hardware Libraries (HWLIBs)||✓||✓||✓||✓|
|Intel Quartus® Prime Programmer||✓||✓||✓||✓|
|Signal Tap LogicAnalyzer||✓||✓||✓||✓|
|Intel® Boot Disk Utility||✓||✓||✓||✓|
|Device Tree Generator||✓||✓||✓||✓|
|Golden Hardware Reference Designs for SoC FPGA development kits||✓||✓||✓||✓|
|Triple-Speed Ethernet (TSE) with Modular Scatter-Gather Direct Memory Access (mSG-DMA)†||✓||✓||✓||✓|
|PCIe* Root Port with Message Signal Interrupts (MSI)†||✓||✓||✓||✓|
|Partial Reconfiguration Design Example||✓||✓||✓||✓|
|Host OS Support|
|Windows* 7 64 bit||✓||✓||✓||✓|
|Windows 10 64 bit||✓||✓||✓||✓|
|Red Hat Linux 6 64 bit||32 bit libraries are required||32 bit libraries are required||32 bit libraries are required||32 bit libraries are required|
After you have installed the SoC EDS, start the ARM DS-5 Intel SoC FPGA Edition. If this is your first time using the DS-5 software, a popup dialog will automatically ask if you wish to open the license manager. Otherwise you can open the license manager from the Help menu. Choose 'Add License', and select the 'Enter a serial number or activation code' to obtain a license default option. You are prompted for an ARM license serial number or activation code entry. Depending on which version you have acquired, one of the following options applies:
- SoC EDS Standard and Pro Free License Activation
Activating the DS-5 Community Edition Software
For the free version of the DS-5 Intel SoC EDS software, you will be able to use the DS-5 software perpetually to debug Linux* applications over an Ethernet connection. Obtain your ARM license activation code on the ARM DS-5 web page and enter it into the input field.
- SoC EDS Standard and Pro Paid License Activation
Activating the DS-5 Intel SoC FPGA Edition
If you have purchased the SoC EDS Standard or Pro Edition software or purchased selected development kits that include a license for DS-5, you would have received an ARM license serial number printed on a letter in the box. This is a 15-character alphanumeric string with two dashes in between. Enter this serial number into the input field to get full capabilities of DS-5 Intel SoC FPGA Edition. This license includes one-year support and maintenance term from ARM that starts on the day of purchase or renewal.
30-Day Evaluation of the DS-5 Intel SoC FPGA Edition
If you want to evaluate the SoC EDS Standard or Pro Edition software, you can get a 30-day evaluation activation code on the ARM DS-5 web page. Please enter this ARM license activation code into the input field to get the full capabilities of DS-5 Intel SoC FPGA Edition for a limited time.
Note: For a more detailed guide on Licensing, please refer to the Licensing chapter in the Intel SoC FPGA Embedded Development Suite User Guide.
|Intel SoC FPGA Embedded Development Suite User Guide||A complete introduction of all features of the SoC EDS.|
|SoC EDS Getting Started (Wiki)||A hands-on and step-by-step guide targetting Cyclone V SoC Development Kit and Intel Arria 10 SoC Development Kit. Topics include building bootloaders, compiling and debugging Baremetal/HWLIBs, Linux application/kernel debugging, tracing, cross-triggering, and so on.|
|Intel SoC FPGA Embedded Development Suite Release Notes||Release notes of the latest version of SoC EDS, including enhacements, bug fixes, and revision history.|
|FPGA-Adaptive Software Debug and Performance Analysis White Paper (PDF)||A white paper that outlines Intel and ARM’s latest innovations in on-chip debug logic, FPGAs, and software debug and analysis tools.|
|System Trace Macrocell Packs Major Benefits for High-Performance SoC System Debug White Paper (PDF)||A white paper that introduces why the CoreSight System Trace Macrocell (STM) is superior to an Instrumentation Trace Macrocell (ITM).|
For more SoC Linux and open-source products, including documentation, visit www.rocketboards.org. For information about the Linux-based Golden System Reference Design (GSRD) that is typically pre-programmed into the board, search rocketboards.org for “GSRD”.
Please take a moment to register your SoC product on the SoC EDS Registration page. This will help you to keep track of your license numbers and activation status so as to provide license support. After registration, you will receive further instructions and a link to activate your DS-5 license.