Real-Time Transceiver Access for Faster Board Bring-Up
Transceiver Toolkit uses System Console technology to help FPGA and board designers validate transceiver link signal integrity real-time in a system and improve board bring-up time. Test for bit-error rate (BER) while simultaneously running multiple links at your target data rate to validate your board design with Transceiver Toolkit. Tune transceiver analog settings for optimal link performance while using different test metrics to quantify results. Simultaneously test multiple devices across one or more boards using link tests in the Transceiver Toolkit GUI. Support for Intel Agilex® 7, Intel® Stratix® 10, and Stratix® V FPGAs and includes adaptive equalization (AEQ) and decision feedback equalization (DFE) for signal transmission robustness. The latest additions include support for Intel Agilex® 7 Transceiver tiles.