Today’s modern data centers are being transformed to meet the demands of increased networking bandwidth, increased processing with workloads like artificial intelligence, and with more stringent requirements like reduced query response time. Data center administrators expect all of these needs to be provided with a lower TCO while also enabling new services. Intel is helping customers meet these demands with Intel® accelerators that enhance the performance of specific workloads while improving power consumption.
Intel has an extensive developer base in the data center. These developers, who are very familiar with the Intel® Xeon® processor and the Intel® architecture, have access to the broadest portfolio of accelerators – from built-in acceleration in Intel® Xeon® processors to the Intel® Iris® Pro graphics processor. Intel is making workload optimization with Intel® Xeon® CPU and acceleration easier to use.
A key challenge for application developers is time to market. Intel is enabling Intel® architecture users, traditional OS developers, open language users, and other ecosystem developers with tools built around industry standards. Unlike other solutions, developers using the Intel® acceleration portfolio can use the tool, SDK, or OS they are comfortable with, without learning a new language. A developer may leverage his experience with the Intel® architecture and determine the best accelerator for their workload or application. Developers can create their application solution from a new system with the Intel® Xeon® Scalable processor or retrofit an existing Intel® Xeon® CPU system with Intel and partner accelerator cards.
Tuesday, October 17, 2017
Market-specific accelerator functions are now available through the expansion of the global Intel® FPGA Design Solutions Network (DSN) Program. These DSN members are delivering new accelerator functions—specific software IP that can speed up complex computations. In combination with the Intel Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA, these ‘drop-in’ accelerator functions provide unique solutions that accelerate big data applications such as AI inference, real-time data analytics, cybersecurity, genomics and more, helping customers to supercharge server and data center performance and while lowering their total cost of ownership.
Monday, October 2, 2017
Intel has announced the first in a family of Intel® Programmable Acceleration Cards, the Intel® Programmable Acceleration Card (Intel® PAC) with the Intel® Arria® 10 GX FPGA (A10GX). This is the first FPGA-based acceleration platform to support the Acceleration Stack for Intel® Xeon® CPU with FPGAs. In the near future, Intel will also offer Intel® Xeon® processors with Integrated FPGA for a high-bandwidth, cache-coherent, low-latency solution.
Monday, September 4, 2017
Intel has announced a new set of software tools to make FPGA programming accessible to mainstream developers. The Acceleration Stack for Intel® Xeon® CPU with FPGAs makes it easier to develop and deploy Intel FPGAs for workload optimization in the data center. As part of this announcement, Intel has released the Open Programmable Acceleration Engine (OPAE) on Github to foster an open ecosystem and encourage the use of FPGA acceleration in the data center.