Creating Second Stage Bootloader for Altera SoCs (OSOCSSBL)
Course Description
This course discusses how to use the tools and features available in the Altera® SoC Embedded Design Suite to successfully customize and generate a second stage bootloader for ARM®-based SoC devices. We will talk specifically about the flow and the tools necessary to quickly generate a customized second stage bootloader. We will cover both the preloader which is the Arria® V and Cyclone® V version of the second stage bootloader as well as the U-Boot bootloader which is the Arria 10 version of the second stage bootloader.At Course Completion
You will be able to:
- Understand the flow and tools available to quickly customize and generate the second stage boot software
- Be able to generate a preloader image for Cyclone V and Arria V SoCs
- Be able to generate a bootloader image for Arria 10 SoCs
Skills Required
- Basic software development knowledge
- Understanding of SoC Boot Flow
Prerequisites
We recommend completing the following courses:
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):
Related Courses
Below are the related courses you may be interested in:
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum:
Class Schedule
Result Showing 1
Location | Dates | Price | Registration |
---|---|---|---|
On-line | Anytime | Free | Register Now |