Using Fast Forward Compile for the Intel® HyperFlex™ Architecture (OS10FFC)

Course Description

In the Using Fast Forward Compile for the Intel® HyperFlex™ Architecture course, you will learn how to use Fast Forward Compile, an Intel® Quartus® Prime Pro software analsysis tool that provides design performance recommendations with specific design changes you can make to improve your Intel Agilex™ or Intel Stratix® 10 FPGA design’s clock speeds.

In this training, you will learn how to run a Fast Forward analysis and how to read its output reports that will help you to plan design changes and estimate the performance gains you can achieve if the corresponding changes are implemented. As a result, you will better understand where to invest design effort to achieve your target design goals.

At Course Completion

You will be able to:

• Enable and run a Fast Forward Compile in the Intel Quartus Prime Pro software
• Use the results of Fast Forward Compile to achieve required performance gains

Skills Required

• Familiarity with FPGA/CPLD design flow
• Familiarity with the Intel Quartus Prime Pro design software

Prerequisites

We recommend completing the following courses:

• Intel® Quartus® Prime Software Hyper-Aware Design Flow
• Stratix® 10 HyperFlex™ Architecture Overview
• The Intel® Quartus® Prime Software Design Series: Timing Analysis with Timing Analyzer
• The Intel® Quartus® Prime Software: Foundation (Instructor-led / Virtual Training)
• The Intel® Quartus® Prime Software: Foundation (Pro Edition) (Online Training)
• Timing Analyzer: Introduction to Timing Analysis
• Timing Closure with Intel® Quartus® Prime Pro Software

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

• Advanced Optimization with Intel® Hyperflex™ Architecture
• Introduction to Hyper-Retiming

Related Courses

Below are the related courses you may be interested in:

• Performance Optimization with Intel® Stratix® 10 FPGA Hyperflex™ Architecture

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

• FPGA Designers - Level 300

Class Schedule

Result Showing 1