Using Channels and Pipes with OpenCL™ on Intel® FPGAs (OOPNCLCHPIPE)

35 Minutes Online Course

Course Description

This course covers using channels and pipes with OpenCL™ kernels written for Intel® FPGAs. The advantages of this methodology vs the standard host-centric methodology using global memory are discussed. The pragmas, attributes, and functions needed in your kernel code and in your host program are explained. Several examples are presented including an implementation using a streamer kernel, and one using a ping-pong buffer. Host pipes, which are a way the host can write directly to the kernel, are covered. This includes a lab exercise which will give you hands-on practice: https://www.altera.com/customertraining/OLT/OpenCLChannels/lab.zip https://www.altera.com/customertraining/OLT/OpenCLChannels/lab.pdf *OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of Khronos

At Course Completion

You will be able to:

  • Explain the advantages of using channels and pipes in your Intel FPGA OpenCL implementation
  • Implement channels and pipes in your code
  • Explain the differences between channels and pipes
  • Understand each type of channel/pipe: kernel-to-kernel, IO, and host

Skills Required

  • A basic knowledge of OpenCL kernel code and host code
  • A basic knowledge of how to run the Intel FPGA SDK for OpenCL

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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