HLS Local Memory Optimizations (Part 5 of 7) (OHLS5)
Course Description
In the class, you will learn how to effectively optimize local memory inside an HLS component. We will cover how the compiler tries to automatically create stall-free memory architectures for local memory. We will discuss how to use attributes to specify memory structure, and we’ll talk about how some array structures are converted to registers. Download a PDF of the presentation and a hands-on lab exercise here: http://www.altera.com/customertraining/Videos/HLSPart5.zipAt Course Completion
You will be able to:
- Understand how the HLS compiler create local memory architectures
- Use attributes to create the optimal local memory
- Use effective techniques to implement arrays in registers
Skills Required
- Basic understanding of the C++ programming language
- Basic understanding of FPGAs and the Intel Quartus Development Environment
Prerequisites
We recommend completing the following courses:
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: