HLS Interfaces (Part 2 of 7) (OHLS2)

31 Minutes Online Course

Course Description

In the class, we will cover the various component interfaces that can be generated by the Intel® HLS Compiler. The interfaces covered include scaler interfaces, memory-mapped master and slave interfaces, and streaming interfaces. Download a PDF of the presentation and a hands-on lab exercise here: http://www.altera.com/customertraining/Videos/HLSPart2.zip

At Course Completion

You will be able to:

  • Understand the various interfaces available with the Intel HLS Compiler
  • Select the most optimal interface for various types of components

Skills Required

  • Basic understanding of the C++ programming language
  • Basic understanding of FPGAs and the Intel Quartus Development Environment

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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