The Nios® II Processor: Hardware Abstraction Layer (OEMB1150)

34 Minutes Online Course

Course Description

This training will demystify the Nios II Hardware Abstraction Layer, or HAL. You will be introduced to the fundamental concepts of the Nios II HAL and see the various HAL resources that have been provided to accelerate software development for the Nios II processor. You will be introduced to the APIs available in the HAL, IO communication libraries, Newlib, and HAL BSP projects. You will also learn how to use interrupts with the Nios II process. This class provides a good base of knowledge for beginning to write your own drivers for the Nios II processor. This training includes a lab exercise which can be found at the following locations: Instructions: https://www.altera.com/customertraining/OLT/NiosII_HAL/lab.pdf Files: https://www.altera.com/customertraining/OLT/NiosII_HAL/lab.zip

At Course Completion

You will be able to:

  • Describe the functionality and structure of a Nios II HAL API
  • Name and describe the major pieces of a HAL BSP project
  • Write and register an interrupt service routine for the Nios II processor
  • Interact with an IO peripheral using software functions from the HAL

Skills Required

  • Basic software development knowledge

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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