DSP Builder Advanced Blockset: Interfaces and IP Libraries (ODSPINTIP)

25 Minutes Online Course

Course Description

The DSP Builder for Intel® FPGAs is a collection of library blocks for the Mathworks* Matlab* Simulink* environment that allows you to generate device-optimized high-performance DSP systems for Intel FPGAs. In this training we will discuss how to use the blocks in the Interfaces and IP libraries within the DSP Builder Advanced Blockset. We will discuss the default interfaces of the DSP Builder and how to create custom streaming and memory-mapped interfaces to interact with external components. We will also cover the functionality provided by IP blocks which makes it easy to implement FFTs, channel filters, and waveform synthesis blocks. *Other names and brands may be claimed as the property of others

At Course Completion

You will be able to:

  • Use streaming library blocks to create Avalon streaming inputs and outputs
  • Use memory mapped library blocks to create custom registers and memories accessible from the host processor interface
  • Use IP blocks to implement FFTs, Filters, and Waveform Synthesis functions
  • Constrain latency of IP blocks

Skills Required

  • Basic knowledge of MATLAB, Simulink and the Intel® Quartus® Prime software
  • Basic understanding of the DSP Builder for Intel® FPGAs

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Related Courses

Below are the related courses you may be interested in:

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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