Using Design Space Explorer (ODSE)

22 Minutes Online Course

Course Description

Learn how to use the Intel® Quartus® Prime Pro Design Space Explorer II (DSE) as an aid to remote and parallel compilation. The training starts with a little background about the challenges of larger FPGA devices and how the DSE tool can help you face this challenge. Then you will learn the steps to use the DSE tool explore a design and optimize it for timing, area or power. You will see an example that demonstrates the DSE features. Finally, you will learn about how to use the DSE tool via the command line. This training is relevant for the Intel Quartus Prime Pro software version 18.1 and newer.

At Course Completion

You will be able to:

    -Understand the issues with large FPGA designs. -Explore your design using DSE features such as: -Remote or parallel compilation -Seed sweep -Optimize for timing or area -Use the DSE tool via the command line.

Skills Required

  • Background in digital logic design
  • An understanding of basic FPGA design flow
  • Basic understanding of the Quartus II user interface

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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