SystemVerilog和Quartus II 软件 (Chinese Version of SystemVerilog with the Quartus II Software) (OCHDL1125)

Course Description

SystemVerilog是IEEE 1364-2005 Verilog标准的一组扩展标准。这一在线培训课程介绍Quartus® II 软件11.1所支持的SystemVerilog扩展标准。这些扩展标准是可综合结构，帮助您以更高效的方式来完成设计。

At Course Completion

You will be able to:

• 实现SystemVerilog数据类型和声明，例如，逻辑、类型定义和枚举类型等
• 实现SystemVerilog程序块
• 实现程序声明，包括SystemVerilog增强case声明
• 使用SystemVerilog编码类型实现状态机
• 使用SystemVerilog中的增强端口链接功能

Skills Required

• 完成了“使用Quartus II 软件：入门”课程，或者
• 基本掌握FPGA设计流程和Quartus II 软件
• 很好的掌握Verilog语言

Prerequisites

We recommend completing the following courses:

• Verilog HDL基础 (Chinese Version of Verilog HDL Basics)
• 使用Quartus Prime 软件工具: 简介 (Chinese Version of Using the Quartus Prime Software: An Introduction)

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

• Partial Reconfiguration with Arria 10 FPGAs

Related Courses

Below are the related courses you may be interested in:

• Migrating to the Quartus Prime Pro Edition Software

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

• Fundamentals Part 2

Class Schedule

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