Advanced System Design Using Platform Designer: System Verification with System Console (OAQSYSSYSCON)

26 Minutes Online Course

Course Description

This training is part 2 of 4. The Platform Designer system integration tool saves significant time by automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems. In this training you will learn about some advanced capabilities of the tool. In the second part, you will learn about the powerful System Console tool that gives you the ability to connect into and debug an actively running system design. You'll learn about the Platform Designer components that provide JTAG access into the system for use by the System Console. You'll see examples of what you can do with System Console, focusing on the ability to read and write slave components in the system during runtime. This training includes a lab exercise.

At Course Completion

You will be able to:

  • Understand what System Console is, the services it provides, and the basics on its use
  • Add a debug agent to a Platform Designer system design to allow for System Console access
  • Use the master service type to read and write memory-mapped components in the system

Skills Required

  • Background in digital logic design
  • Familiarity with the Intel Quartus Prime software
  • Familiarity with the Platform Designer system design tool

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

Related Courses

Below are the related courses you may be interested in:

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

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