OpenCL™ Development with the Acceleration Stack for Intel® Xeon® CPU with FPGA (OACCELOPNCL)
Course Description
The Acceleration Stack for Intel® Xeon® CPU with FPGA is a robust collection of software, firmware, and tools intended to make it easier to develop and deploy Intel FPGAs for workload optimization in the data center. In this training, we will discuss how to develop an Accelerator Function Unit (AFU) for the Acceleration Stack on the FPGA using the Intel FPGA SDK for OpenCL™. We will also discuss the contents of the OpenCL Support Package for the Intel Programmable Acceleration Card which bridges the OpenCL host code and kernel compute unit to the components of the Acceleration Stack. *OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of KhronosAt Course Completion
You will be able to:
- Know the basics of using the Intel FPGA SDK for OpenCL tools and methods to develop an Accelerator on the FPGA that interacts with the Acceleration Stack
- Understand the contents of the OpenCL Support Package for the Intel® Programmable Acceleration Card, shipped with the Acceleration Stack, which allows the FPGA OpenCL kernel compiler to target the board for use with the Acceleration Stack
Skills Required
- Basic understanding of FPGAs
Prerequisites
We recommend completing the following courses:
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: