Introduction to the Low Latency 10Gb Ethernet MAC Intel® FPGA IP Core (O10GMAC)

Course Description

This online course will instruct you in how to use Intel® FPGA IP solutions to build a 10Gb Ethernet design targeting Intel FPGA transceiver devices using the Intel Quartus® Prime software. In this course, you will learn how to configure the Low Latency 10Gb Ethernet MAC Intel FPGA IP core and how to incorporate it into your design.

At Course Completion

You will be able to:

• Describe the features and functionality of the Low Latency 10Gb Ethernet MAC Intel FPGA IP core

Skills Required

• Understanding of the 10Gb Ethernet technology specifications
• Familiarity with common high-speed transceiver architecture OR viewing the following course: "Transceiver Basics"
• Familiarity with FPGA/CPLD design flow
• Familiarity with the Intel Quartus Prime design software
• Some familiarity with Platform Designer system building tool