Course DescriptionYou will learn how to use the Intel® Quartus® Prime Pro Edition software & correlate these steps to the Xilinx* Vivado* Design Suite to develop an FPGA design. You'll create a new project, input new or existing design files, & compile your project. Learn how to search for compilation information, use settings and assignments to adjust the results of compilation, & manage I/O-related assignments using the Pin Planner and the Interface Planner.
You will learn techniques to help you plan your design. You will employ the Intel Quartus Prime software features to help you achieve design goals faster. You'll learn to plan & manage I/O assignments for your target device.
At Course Completion
You will be able to:
>Identify Intel Quartus Prime software features to replace Xilinx Vivado Design Suite features
>Make pre-project decisions to prepare for an Intel Quartus Prime design
>Create, manage & compile Intel Quartus Prime projects
>Use Intel Quartus Prime tools to view results of compilation
>Review compilation results in various Intel Quartus Prime software reports & graphical viewers
>Plan & manage device I/O assignments using Pin Planner & Interface Planner
>Background in digital logic design
>Ability to describe a hardware system using VHDL, Verilog, or EDA schematic tool
Below are the related courses you may be interested in:
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: