The Intel® Hyperflex™ FPGA Optimization Workshop (IS10WKSHP)

8 Hours Instructor-Led / Virtual Class Course

Course Description

The Intel® HyperFlex™ FPGA Optimization Workshop course builds on the tools and techniques learned in the Performance Optimization with Intel HyperFlex Architecture and Advanced Optimization with Intel HyperFlex training courses. This workshop provides an environment where an FPGA designer can sharpen their optimization skills by exercising those techniques on provided design blocks, while proctored by an Intel FPGA Trainer.

At Course Completion

You will be able to:

  • Use Fast Forward Compile reports to influence optimization decisions on designs targeting the Intel Hyperflex architecture
  • Improve clocking speed by implementing Intel Hyperflex architecture design recommendations on FPGA logic

Skills Required

  • Good HDL coding skills
  • Familiarity with the Intel® Stratix® 10 FPGA Hyperflex™ architecture
  • Completion of the "Performance Optimization with Intel Stratix 10 FPGA Hyperflex Architecture" and "Advanced Optimization with Intel Stratix 10 FPGA Hyperflex Architecture" instructor-led training courses or all equivalent online training courses (see curricula)

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

Class Schedule

Result Showing 2

LocationDatesPriceRegistration
Virtual Classroom (9:00am-1:30pm Pacfic Time)08/25/2020 - 08/26/2020FreeRegister Now
Virtual Classroom (9:00am-1:30pm Pacfic Time)09/15/2020 - 09/16/2020FreeRegister Now