Introduction to the Platform Designer System Integration Tool (IQSYS101)

Course Description

This class will teach you how to quickly build designs for Intel® FPGA devices using the Platform Designer system-level integration tool (formerly known as Qsys), part of the Intel Quartus® Prime software. You will become proficient with using Platform Designer and learn how to quickly integrate “off-the-shelf” IP and custom logic into a system. Platform Designer makes design reuse easy through the use of standard interfaces, so you will learn about Avalon® interface specification as well as an the Arm* AMBA* AXI interface standard. The class provides a significant hands-on component, where you will gain exposure to tool usage as well as system and custom HDL component design.

*Other names and brands may be claimed as the property of others.

At Course Completion

You will be able to:

• Build digital systems in the Platform Designer tool
• Integrate the files generated by Platform Designer into the Intel Quartus Prime software design flow
• Create custom components with the Avalon memory-mapped interface and the Avalon streaming interface and integrate them into your system

Skills Required

• Background in digital logic design
• Working knowledge of the Intel Quartus Prime software
• Knowledge of HDL coding methodology (helpful but not mandatory)

Prerequisites

We recommend completing the following courses:

• The Intel® Quartus® Prime Software: Foundation (Instructor-led / Virtual Training)
• The Intel® Quartus® Prime Software: Foundation (Standard Edition) (Online Training)
• Using the Intel® Quartus® Prime Standard Edition Software: An Introduction

Follow-on Courses

Upon completing this course, we recommend the following courses (in no particular order):

• Advanced Qsys System Integration Tool Methodologies

Related Courses

Below are the related courses you may be interested in:

• Migrating to the Quartus Prime Pro Edition Software

Applicable Training Curriculum

This course is part of the following Intel FPGA training curriculum:

• FPGA Designers - Level 200

Class Schedule

Result Showing 4

Training Partners teach similar content in other regions of the world.