Using the Intel® FPGA SDK for OpenCL, software developers can quickly and efficiently use OpenCL to generate custom hardware for an FPGA. Leveraging this capability for your custom FPGA board requires building an Intel FPGA SDK for OpenCL-compatible custom Board Support Package (BSP).
This training will cover the requirements of a custom BSP. You will learn the steps necessary to convert an Arria® 10 reference platform BSP to the hardware & software deliverables needed for an Arria 10-based custom BSP.
*OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of Khronos.
At Course Completion
You will be able to:
- Identify reference platform contents: design files, script files, Quartus® project files
- Know the custom-BSP hardware and software deliverables
- Understand OpenCL BSP-specific Qsys IP components
- Setup and verify OpenCL BSP development environment
- Know the steps necessary to customize the Arria 10 reference platform
- FPGA design knowledge: architecture (including clocking, global routing, I/Os), high-speed design, timing analysis, Qsys design, floorplanning using LogicLock regions, Tcl scripting
- Familiarity with the following interfaces: Avalon® (both streaming and memory-mapped), PCIe, external memory (DDR3 or DDR4)
- Basic OpenCL coding knowledge
- Basic C coding knowledge
We recommend completing the following courses:
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum:
No class is being offered at this time.