Optimizing OpenCL™ for Intel® FPGAs (16 Hours Course) (IOPNCL2102DAY)
Course Description
This course covers optimization techniques to implement a high performance OpenCL™ solution on FPGAs. We'll use various debug & analysis tools available in the Intel® FPGA SDK for OpenCL to boost performance of OpenCL kernels. The first half of the course focuses on the optimization of single work-item kernels & the utilization of Intel FPGA channels & OpenCL pipes. The second half of the course focuses on the optimization of ND range kernels & the effective utilization of various memory systems implemented by the Intel FPGA kernel compiler. Throughout the course we will discuss good OpenCL coding design practices for FPGAs & use Intel FPGA SDK for OpenCL features to improve OpenCL performance on FPGAs. *OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of KhronosAt Course Completion
You will be able to:
- Use debugging & optimization tools
- Execute multiple OpenCL kernels in a task parallel fashion
- Boost performance of single work-item kernels
- Use single work-item kernels to implement parallel programming algorithms
- Use Intel FPGA channels or OpenCL pipes to increase communication performance
- Boost performance of NDRange kernels
- Improve usage of memory architectures
- Improve host-device communication efficiency
- Use good OpenCL coding practices
- Boost data processing efficiency
Skills Required
- Attendance of the Introduction to OpenCL for Intel FPGAs or a good understanding of the OpenCL standards
Prerequisites
We recommend completing the following courses:
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum:
Class Schedule
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| Location | Dates | Price | Registration |
|---|---|---|---|
| Virtual Classroom | 11/06/2018 - 11/08/2018 | $1390 | Register Now |