Flash Memory Types
This section introduces the different flash types supported by Intel Stratix 10 devices.
The QSPI flash devices have the following advantages:
- Reliability: they typically support a minimum of 100,000 erase cycles per sector and a minimum of 20 years data retention. As a result, their management is simpler, with no need for error correction and bad block management.
- Low pin count requirement: a quad SPI flash device typically requires six pins, but it can be used with as few as four pins.
- High bandwidth
A quad SPI flash device typically has smaller storage capacity than other flash devices. They are therefore mostly used as a boot source and not for mass storage.
Up to four quad SPI flash chip selects can be used with Intel Stratix 10 devices. The FPGA will configure only from quad SPI flash connected to the chip select zero, while the others may be used for mass storage purposes.
The standard for QSPI flash devices has a lot of variability, and the QSPI flash controller has some limitations. Therefore there is a need for each family of flash devices to be tested and validated individually to confirm compatibility with Intel Stratix 10.
The SD/SDHC/SDXC/MMC cards have the following advantages:
- Large storage capacities
- Internal error correction, bad block management, and wear levelling
Some of the disadvantages of SD/SDHC/SDXC/MMC are:
- Typically less reliable than quad SPI (although higher reliability industrial versions are available)
- They require a socket, which makes them more vulnerable mechanically.
The eMMC flash devices have the following additional advantages over SD/SDHC/SDXC/MMC flash devices:
- Improved reliability
- Smaller, not removable (soldered down) package
Intel Stratix 10 devices are compatible with the following flash devices:
- SD/SDHC/SDXC (including eSD) - version 3.0 compliant
- MMC - version 4.41 compliant
- eMMC - version 4.5 compliant
Because the above standards expose a simple and uniform interface, any compliant device will work, and there is no need to list individual part numbers to confirm compatibility with Intel Stratix 10.
The main advantage of the NAND flash devices is large storage capacity.
The disadvantages of NAND flash devices include:
- A high pin count requirement (a minimum of 15 pins are required)
- More difficult to manage, as individual bit reliability is lower compared to quad SPI flash, error correction, and bad block management are required
- Lower maximum bandwidth as compared to quad SPI flash devices
The NAND flash devices to be used with Intel Stratix® 10 SoC must satisfy at least the following requirements:
- ONFI 1.0 compatibilty
- x8 and x16 supported
- Single-level cell (SLC) or multi-level cell (MLC)
- One ce# and rb# pin pair available through dedicated HPS pins. Four pairs available through FPGA pins.
- Page size: 512 bytes, 2 KB, 4 KB or 8 KB
- Pages per block: 32, 64, 128, 256, 384, or 512
- Error correction code (ECC) sector size can be programmed to 512 bytes (for 4 , 8, or 16 bit correction) or 1,024 bytes (for 24 bit correction)
As the ONFI standard offers some variability, and the NAND flash controller has some limitations, there is a need for each family of flash devices to be tested and validated individually to confirm compatibility with Intel Stratix 10.