Welcome to the OpenCL™ BSP support page! Here you will find information on how to plan, design, and implement your OpenCL™ BSP, as well as learn a few tips and tricks for debugging purposes.
This page is set up to walk you through from start to finish the process of developing an OpenCL™ Board Support Package (BSP) (or designing/migrating OpenCL kernel/algorithms). In the Modify a Reference Design section you will find resources on how to modify the Intel® reference platform into your own custom platform as well as how to compile flat designs without timing failure. The Floor Planning section provides guidance on how to partition your design and to achieve maximum operating frequency. The Timing Closure section describes the techniques to close timing on your design and have a guaranteed timing closure while compiling any kernel against the BSP. The Testing the Hardware section provides steps on how to test your design on your board and verify the result.
The Debug section provides you with some tools and resources for debugging issues you might encounter. There are documents and training courses listed in all the sections that are helpful during the BSP development process.