Configuration Features

Decompression Support

Some Altera® FPGAs support configuration data decompression, which saves configuration memory space and time. This feature allows you to store compressed configuration data in configuration devices or other memory and transmit this compressed bitstream to the FPGA. During configuration, the FPGA decompresses the bitstream in real time and configures its CRAM cells.

For more information, refer to the configuration chapter of the respective Altera FPGA in the Configuration Handbook.

Design Security Support

Some Altera FPGAs can decrypt a configuration bitstream using the advanced encryption standard (AES) algorithm—the most advanced encryption algorithm available today. When using the design security feature, a security key is stored in the FPGA. To successfully configure an FPGA that has the design security feature enabled, you must configure the FPGA with a configuration file that was encrypted using the same security key. Some Altera FPGAs offer both volatile and non-volatile security key storage. The volatile security key storage requires battery back-up but enables the security key to be updated. The non-volatile security key can be stored in non-volatile memory inside the device and does not require battery back-up for storage. For more information, refer to the configuration chapter of the respective Altera FPGA in the Configuration Handbook.

Remote System Upgrade Support

Some Altera devices have dedicated remote system upgrade circuitry. Soft logic (either the Nios® II embedded processor or user logic) implemented in the device can download a new configuration image from a remote location, store it in configuration memory, and direct the dedicated remote system upgrade circuitry to initiate a reconfiguration cycle. The dedicated circuitry performs error detection during and after the configuration process, recovers from any error condition by reverting back to a safe configuration image, and provides error status information. This dedicated remote system upgrade circuitry helps to avoid system downtime. For more information, refer to the configuration chapter of the respective Altera device in the Configuration Handbook.

Table 1 provides a summary of the configuration features supported by each Altera FPGA family.

 

Table 1. Configuration Features Supported by Altera FPGAs

Device

Decompression Support

Design Security Support

Remote System Upgrade Support

Stratix® V

Yes

Yes

Yes

Stratix IV Yes Yes Yes
Stratix III Yes Yes Yes
Stratix II and Stratix II GX Yes Yes Yes
Stratix and Stratix GX - - Yes
Arria® V SoC

Yes

Yes

Yes

Arria V

Yes

Yes

Yes

Arria II GX

Yes

Yes

Yes

Arria GX

Yes

-

Yes

Cyclone® V SoC

Yes

Yes

Yes

Cyclone V

Yes

Yes

Yes

Cyclone IV E

Yes

-

Yes

Cyclone IV GX

Yes

-

Yes

Cyclone III LS Yes Yes Yes
Cyclone III

Yes

-

Yes

Cyclone II Yes - -
Cyclone Yes - -