External power supplies provide the electrical energy needed for proper operation both internally and externally to a FPGA or CPLD. When implementing power supply solutions, designers need to understand the total power required from these supplies (also referred to as “rail power”). Furthermore, designers need to consider how much of that total power is actually dissipated within the device (referred to as “thermal power” or “dissipated power”) as compared to the portion of total power that is dissipated outside the device, such as in external output capacitive loads and balanced resistor termination networks.
The total power consumed by a device, output loading, and external termination networks (if present) is generally comprised of the following major power components:
Standby power is from ICCINT current in the device in standby mode. Core dynamic power is from internal switching within the device (charging and discharging capacitance on internal nodes). I/O power is from external switching (charging and discharging external load capacitance connected to device pins), I/O drivers, and external termination network (if present).
The thermal power is the component of total power that is actually dissipated within the device package, with the remainder being dissipated externally. The actual thermal power dissipated within the device is what designers should consider when deciding if the device’s intrinsic heat transfer ability (referred to as thermal resistance) is sufficient to keep internal die-junction temperatures within normal operating specifications, or if additional thermal solutions, such as aluminum heat sinks, are required for even better heat transfer performance. In general, standby power, dynamic power, and a portion of I/O power will comprise the actual thermal power component of total power.
The device consumes power during standby due to leakage currents. The amount varies with die size, temperature, and process variations. Standby power can be simulated before full device characterization and can be defined in two categories: typical and maximum power.
Stratix® II devices use a 90 nm process technology optimized for power and performance. Compared to previous process technology devices, 90 nm devices dissipate more power due to leakage, becoming a significant component of overall power. Standby power exhibits a strong dependence on die-junction temperature at the 90 nm process node, more so than previous process technologies. Designers need to focus on keeping junction temperature to a minimum in order to lower the standby component of total power. Figure 1 below shows the relationship between standby power and junction temperature.