On-Chip Hot-Socketing and Power-Sequencing Support

Hot socketing refers to the capability to insert a board into, or remove a board from, a system during operation without causing negative effects to the system or the board. It is also referred to as “hot swapping” or “hot plug-in.”

Devices in the Stratix® series and Cyclone® series FPGAs, and the MAX® series CPLDs, are designed and tested to offer robust support for on-chip hot-socketing and power-sequence protection without needing additional external devices or board manipulation.

A device must meet three criteria to be considered hot-socketable:

  • It can be driven before power up without any damage
  • It does not drive out before power up
  • It does not drive out during power up

To find out more about the advantages of the on-chip hot-socketing support in Intel®  FPGA devices, refer to the Intel FPGA Hot-Socketing & Power-Sequencing Advantages (PDF) white paper that details Intel FPGA’s hot-socketing advantages. For detailed characterization data, refer to the Hot-Socketing & Power-Sequencing Feature & Testing for Intel FPGA Devices (PDF) white paper.

For detailed characterization data, refer to the white paper detailing hot-socketing features and testing for Stratix, Stratix GX, Stratix II, Stratix II GX, Stratix III, Cyclone and Cyclone II FPGA families, and MAX V, MAX II, MAX 7000AE and MAX 3000A CPLD families.

Protection in PLDs for High-Availability Systems

Hot socketing is a critical requirement for systems that require high availability (constant system uptime), such as network storage servers or carrier-class telecommunication infrastructures, where each second of system downtime translates directly into revenue losses.

Protection in PLDs for Multi-Voltage Systems

In multi-voltage systems for which hot socketing is not required, hot-socketing and power-sequence protection capability for the PLD is still critical. In these systems, regulators are used to provide different voltage levels and can cause the power-up sequence to become unpredictable; devices that require a predetermined power-up sequence may no longer function properly.

The hot-socketing support in PLDs can alleviate problems in multi-voltage system designs because normal PLD functionality will not be influenced by the system power-up sequence. This can be vital for the common application where CPLDs are used to control the power up of other devices in very complex systems.

Table 1 outlines some example systems in different market segments that benefit from hot socketing in Intel FPGA devices.

Table 1. Examples of Systems Requiring Hot Socketing

Market Segment Application Examples
  • Hubs
  • Routers
  • Switches
Computing Services
  • Workstations
  • Computer servers
Data Storage
  • Data switches
  • Tape automation system
  • Storage system data centers
Wireless Communications
  • Cellular basestation infrastructure
Wireline Communications
  • PBX and central office infrastructure

On-Chip Hot-Socketing and Power-Sequencing Support Advantages

There are several techniques used to ensure that PLDs function properly during hot socketing, including sequence connectors and discrete hot-swap controllers. Table 2 compares hot socketing in Intel FPGA PLDs versus using other techniques.

Table 2. Intel FPGA PLDs vs. Alternatives

  Intel FPGA Hot-Socketable PLD (1) Sequenced Connectors Hot-Swap Controller
  • Includes no-hassle, drop-in implementation
  • Normal PLD functionality not influenced by power-up sequence (2)
  • Includes on-chip support (no external devices or board manipulation required) (3)
  • Guarantees that ground and power pins mate with the backplane before signal pins
  • Includes in-rush current protection
  • Includes power-up sequence control
Disadvantages -
  • May not work for multi-voltage systems
  • Requires careful on-board power distribution
  • Requires additional external device
  • Uses more board space
  • Contradicts with the pin-mating sequence requirements
  • Requires additional investments
  • May not guarantee hot-socketing capability of the PLD I/O buffers


  1. For the actual hot-socketing specification for each PLD family, refer to the handbook or data sheet of each respective family.
  2. The hot-socketing support in the Stratix, Stratix GX, and Cyclone FPGA families and the MAX 7000AE and MAX 3000A CPLD families is verified against different power-up sequences. Detailed test set up and procedures can be found in the characterization report in the Hot-Socketing & Power-Sequencing Feature & Testing for Intel FPGA Devices (PDF) white paper. The Stratix II, Stratix II GX, Stratix III, Stratix IV, Stratix V, Cyclone II, Cyclone III, Cyclone IV, MAX V and MAX II device families will also support the hot-socketing feature.
  3. The APEXTM II, APEX 20K, ACEX® 1K, MercuryTM, FLEX® 10KA, FLEX 10KE, and 3.3-V FLEX® 6000 FPGA families, and the MAX 7000B CPLD family also support hot socketing. For more information, refer to AN 107: Using Intel FPGA Devices in Multiple-Voltage Systems (PDF).