Starting in the Intel® Quartus® Prime Pro Edition software version 19.1, you can use nINIT_DONE signal generated from Reset Release Intel® Stratix® 10 FPGA IP to hold a control circuit in reset until the device has fully entered user mode. The nINIT_DONE signal can be used as the trigger condition in Signal Tap power-up trigger to capture events that occur during device initialization. However, Intel® Quartus® Prime Pro Edition software may randomly place the Signal Tap registers either on ALM registers or Hyper registers. When Hyper registers are used, the Signal Tap registers may not able to reset to the correct state which will not enable the power-up trigger.
Device Family: Intel® Stratix® 10
Intel Software: Quartus Prime Pro
Last Modified: October 07, 2020
Version Found: v19.1
Bug ID: 1507322437