Due to a problem in the Intel® Quartus® Prime Pro Edition software version 17.1 and earlier, you may see this error message when compiling a design that includes the LVDS IP. This problem occurs when the IP is in external PLL mode and targets an Intel Stratix® 10 device.
Device Family: Intel® Stratix® 10
Intel Software: Quartus Prime Pro
Last Modified: February 06, 2018
Version Found: v17.1
Bug ID: FB: 525800;
IP: Memory Interfaces and Controllers, Altera LVDS SERDES