Device Family: Intel® Arria® 10

Type: Answers

Area: Intellectual Property

Last Modified: November 23, 2016
Bug ID: FB: 401691;
IP: Arria 10 Hard IP for PCI Express

Warning (332088): No paths exist between clock target "*|altpcie_a10_hip_pipen1b|wys|core_clk_out" of clock "dut|wys~CORE_CLK_OUT" and its clock source. Assuming zero source clock latency.


Due to a problem in the Quartus® Prime software versions 16.1 and earlier, you may see this warning when compiling designs containing the Arria® 10 Hard IP for PCI® Express.


This warning can be safely ignored.

The warning is scheduled to be removed from a future release of the Arria 10 Hard IP for PCI Express.