Critical Issue
If you specify an invalid Maximum Avalon-MM burst length value of 256 or greater when using the hard external memory interface resources of Arria V or Cyclone V devices, no error message appears to advise you of the invalid value. Your design may fail during simulation.
This issue applies to the DDR2 and DDR3 SDRAM Controller with UniPHY when targeting Arria V or Cyclone V devices, with the Enable Hard External Memory Interface parameter turned on.
This issue will be fixed in a future version of the DDR2 and DDR3 SDRAM Controller with UniPHY.
There is no workaround for this issue.