If you generate the core targeting a Cyclone IV E device with
the high-performance controller architecture, without creating a
new project first , the MegaWizard Plug-In Manager selects the default
speed grade and clock frequency values that are not supported. If
you generate the core,
The given combination of PLL input
and output cannot be synthesized. error message appears.
This issue affects all designs that use the high-performance controller architecture targeting Cyclone IV E devices .
Your system cannot be generated.