Critical Issue
When you turn on the Enable Error Detection and Correction Logic option, the ECC control register, ECC status register, and ECC error address register are not accessible from the controller register map.
This issue affects all configurations using ALTMEMPHY-based interfaces and version 11.0 or later of the high-performance controller II with the Enable Error Detection and Correction Logic option turned on.
You are unable to access the ECC control register, ECC status register, or ECC error resister in the controller register map.
There are two workaround options for this issue.
Option 1:
Enable the Configuration and Status Register Interface when you enable the Error Detection and Correction Logic option.
Option 2 (applicable to Verilog designs only):
Open the alt_mem_ddrx_controller_st_top.v file
in an editor and change the line:
if (CTL_CSR_ENABLED == 1) begin
...
.MEM_IF_DQS_WIDTH (
CFG_MEM_IF_DQS_WIDTH )
) register_control_inst (
to
if (CTL_CSR_ENABLED == 1) || CTL_ECC_CSR_ENABLED == 1) begin
...
.MEM_IF_DQS_WIDTH (
CFG_MEM_IF_DQS WIDTH ),
.CTL_CSR_ENABLED (
CTL_CSR_ENABLED ),
.CTL_ECC_CSR_ENABLED (
CTL_ECC_CSR_ENABLED )
) register_control_inst (
This issue will be fixed in a future version.