Type: Answers

Type: Errata

Area: EMIF

Area: Intellectual Property



NativeLink Simulation in UniPHY External Memory Interfaces fail for VHDL Output

Description

In version 10.0 of the Quartus II software, when a user specifies VHDL output for the DDR2 and DDR3 SDRAM Controller with UniPHY, the QDR II and QDR II+ SRAM Controller with UniPHY, or the RLDRAM II Controller with UniPHY, and attempts to simulate using NativeLink, NativeLink fails and reports that it cannot find the file <design_name>.vho in the top-level directory.

Workaround/Fix

The workaround for this issue is to edit the <design_name>.vhd file and remove the line similar to the following:

-- IPFS_FILES : <design_name>.vho.