Type: Answers, Errata

Area: EMIF, Intellectual Property



Using Burst Merging Feature for DDR2 and DDR3 SDRAM Controller with UniPHY

Description

For designs created in a version of the high-performance controller II (HPC II) earlier than 11.0, the burst merging feature is turned off by default when a you generate a controller. If your traffic exercises patterns that you can merge, you should turn on merging.. Turning merging on may affect fMAX performance.

Burst Merging is not supported in HPC II generated by the Quartus II software versions 11.0 to 12.0. Support resumes beginning in version 12.1.

Controllers in half-rate configuration may not see Burst Merging happen often, although the Avalon command is set to a Burst Chop (BC) size of 1 because the controller is able to process 1 Burst Chop command every clock. Burst Merging happens only when the controller temporarily stops processing commands due to Refresh or execution of row commands such as Activate/Precharge.

Workaround/Fix

To work around this issue, turn on merging, by changing the ENABLE_BURST_MERGE� parameter from 0 to 1 in the <variation>.v file.