Device Family: Arria® II GX, Arria® GX, Cyclone® III, Cyclone® IV E, Cyclone® IV GX, Stratix® III, Stratix® IV E, Stratix® IV GT, Stratix® IV GX, Stratix® V E, Stratix® V GS, Stratix® V GT, Stratix® V GX

Type: Answers

Area: EMIF, Intellectual Property


IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY

Can I implement single rank DDR2 SDRAM or DDR3 SDRAM DIMM/device for a design created for dual rank?

Description

No, you should not implement single rank DDR2 SDRAM or DDR3 SDRAM DIMM/device for a design created for dual rank. Altera DDR2 SDRAM and DDR3 SDRAM controller IP that is designed for dual rank calibrates both ranks. If the IP is designed for dual rank implementation, during calibration it will try to calibrate both ranks. If you only have one rank populated, the IP will fail to find the second rank while performing calibration and hence will report calibration failure on it.