Note on page 582 (4-6) incorrectly states the following:
Issue : Volume 3: Reference Material Chapter - 4: Functional DescriptionHPC II Controller
Half-rate bridge support is available for ALTMEMPHY-based cores targeting device families other than Arria® II GX. Half-rate bridge support is not available for UniPHY-based cores.
When using the half-rate bridge feature, you must ensure that the local_size data for each write command remains constant until the next write command is issued. In other words, the local_size bus should not be allowed to change unless the burst_begin signal is high.