Device Family: Stratix® V E

Device Family: Stratix® V GS

Device Family: Stratix® V GT

Device Family: Stratix® V GX

Type: Answers

Area: EMIF

Area: Intellectual Property


IP Product: RLDRAM II Controller with UniPHY

Why can't two center PLLs drive two different memory controllers with UniPHY at the bottom of a Stratix V device?

Description

The center PLLs at the bottom only have access to one PHYCLK network in the Stratix® V device.

Workaround/Fix

If you need to use center PLLs to drive two external memory interfaces, use the PLL sharing mode.